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TISP4xxxL3BJ Overvoltage Protector Series
Description (continued)
For metallic protection, the TISP4350L3BJ is connected between the Ring and Tip conductors. For longitudinal protection, two TISP4350L3BJ
protectors are used; one between the Ring conductor to ground and the other between the Tip conductor to ground. The B type ringer has
voltages of 56.5 V d.c. and up to 150 V r.m.s. a.c., giving a peak voltage of 269 V. The TISP4350L3BJ will not clip the B type ringing voltage as
it has a high impedance up to 275 V.
The TISP4070L3BJ should be connected after the hook switch to protect the following electronics. As the TISP4070L3BJ has a high
impedance up to 58 V, it will switch off after a surge and not be triggered by the normal exchange battery voltage.
These low (L) current protection devices are in a plastic package SMBJ (JEDEC DO-214AA with J-bend leads) and supplied in embossed tape
reel pack. For alternative voltage and holding current values, consult the factory. For higher rated impulse currents in the SMB package, the
100 A 10/1000 TISP4xxxH3BJ series is available.
Absolute Maximum Ratings, TA = 25 ° C (Unless Otherwise Noted)
Rating
Symbol
Value
Unit
Repetitive peak off-state voltage
‘4070
‘4350
V DRM
± 58
± 275
V
Non-repetitive peak on-state pulse current (see Notes 1, and 2)
10/160 μ s (FCC Part 68, 10/160 μ s voltage wave shape, Type A)
50
5/310 μ s (ITU-T K.21, 10/700 μ s voltage wave shape)
5/320 μ s (FCC Part 68, 9/720 μ s voltage wave shape, Type B)
10/560 μ s (FCC Part 68, 10/560 μ s voltage wave shape, Type A)
I TSP
40
40
30
A
Non-repetitive peak on-state current (see Notes 1, 2 and 3)
20 ms (50 Hz) full sine wave
12
16.7 ms (60 Hz) full sine wave
1000 s 50 Hz/60 Hz a.c.
Initial rate of rise of on-state current, Exponential current ramp, Maximum ramp value < 100 A
Junction temperature
Storage temperature range
I TSM
di T /dt
T J
T stg
13
2
120
-40 to +150
-65 to +150
A
A/ μ s
° C
° C
NOTES: 1. Initially the TISP4xxxL3BJ must be in thermal equilibrium with T J = 25 ° C.
2. The surge may be repeated after the TISP4xxxL3BJ returns to its initial conditions.
3. EIA/JESD51-2 environment and EIA/JESD51-3 PCB with standard footprint dimensions connected with 5 A rated printed wiring
track widths. Derate current values at -0.61 %/ ° C for ambient temperatures above 25 ° C.
Overload Ratings, T A = 25 ° C (Unless Otherwise Noted)
Rating
Symbol
Value
Unit
Peak overload on-state current, Type A impulse (see Note 4)
10/160 μ s
10/560 μ s
I T(OV)M
200
100
A
See Figure 2
Peak overload on-state current, a.c. power cross tests UL 1950 (see Note 4)
I T(OV)M
for current
A
versus time
NOTE
4: These electrical stress levels may damage the TIS4xxxL3BJ silicon chip. After test, the pass criterion is either that the device is
functional or, if it is faulty, that it has a short circuit fault mode. In the short circuit fault mode, the following equipment is
protected as the device is a permanent short across the line. The equipment would be unprotected if an open circuit fault mode
developed.
AUGUST 1999 - REVISED JANUARY 2007
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
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